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| title | chunk | source | category | tags | date_saved | instance |
|---|---|---|---|---|---|---|
| Bit-serial architecture | 1/1 | https://en.wikipedia.org/wiki/Bit-serial_architecture | reference | science, encyclopedia | 2026-05-05T11:31:28.192019+00:00 | kb-cron |
In computer architecture, bit-serial architectures send data one bit at a time, along a single wire, in contrast to bit-parallel word architectures, in which data values are sent all bits or a word at once along a group of wires.
All digital computers built before 1951, and most of the early massive parallel processing machines used a bit-serial architecture—they were serial computers.
Bit-serial architectures were developed for digital signal processing in the 1960s through 1980s, including efficient structures for bit-serial multiplication and accumulation.
The HP Nut processor used in many Hewlett-Packard calculators operated bit-serially.
Assuming N is an arbitrary integer number, N serial processors will often take less FPGA area and have a higher total performance than a single N-bit parallel processor.
== See also == Serial computer 1-bit computing Bit banging Bit slicing BKM algorithm CORDIC
== References ==
== External links == Application of FPGA technology to accelerate the finite-difference time-domain (FDTD) method BIT-Serial FIR filters with CSD Coefficients for FPGAs